:PROPERTIES: :ID: b536582a-66cc-4239-801f-6136ab4b919d :mtime: 20231025033400 20231020031403 :ctime: 20231020031227 :END: #+title: D-type flip-flop #+filetags: :public:project: * D-type flip-flop A d-type [[id:2c4ec126-9394-40b4-82e0-209cd3501c4b][flip-flop]] is a type of [[id:ddd7853a-3ffa-469e-bb2b-799189379141][synchronous circuit]] used in [[id:4480e585-82a5-4554-b503-dc9d8e201674][sequential logic]]. The "D" stands for "delay" because a d-type flip-flop delays a signal for 1 clock cycle. Essentially \[Q_{next} = D\] \[\overline{Q}_{next} = \overline{D}\] * Transition table | clock | D | $Q_{next}$ | |--------------+---+------------| | rising edge | 0 | 0 | | falling edge | 1 | 1 | | non-rising | X | 0 |