:PROPERTIES: :ID: ad42e3de-5877-4bc1-bf97-c016d64651f9 :mtime: 20231016032340 :ctime: 20231016032338 :END: #+title: Transparent D Latch #+filetags: :public:project: * Definition A transparent D latch is a type of [[id:4480e585-82a5-4554-b503-dc9d8e201674][sequential logic]] circuit which is similar to a [[id:b22aa488-2d6d-4527-8e71-22522f68ac62][RS latch]], except that a transparent D latch is [[id:ddd7853a-3ffa-469e-bb2b-799189379141][synchronous circuit]]. Making the circuit synchronous is achieved by introducing an additional input called *enable* (EN). * About the name The reason a transparent D latch is called "transparent" is because when $EN = 1$, then $Q' = D$. * Level The transparent D latech is so called "level" triggered. * State Transition Table of Transparent D latch | D | EN | Q' | $\overline{Q}'$ | commentary | |---+----+----+-----------------+------------| | X | 0 | Q | $\overline{Q}$ | RS hold | | 0 | 1 | 0 | 1 | RS reset | | 1 | 1 | 1 | 0 | RS set |